Synthesis .....using Design Compiler

I am trying to synthesize a binary counter. The synthesis tool ( using Design Compiler from Synopsys) is generating counter using a full adder and some flip flops and some combinational logic. It is just a simple binary counter, so it should only use just flip flops and simple AND or OR like gates. I know that it depends on the coding style. Can somebody who have already faced such problem give the solution ?