How to download VHDL code into FPGA

I had a problem downloading my VHDL code to FPGA. I did my simulation with my VHDL code.Now i need to download it into FPGA and display the output on 7segment display.I understand that in order to download, i need to create a new top level entity(port SW1,CLK,LED7SEG) and not using my previous top level entity with 2inputs and 1output(simulation).Only after that i can do my pin assignment,rite?Can anyone provide me with a new top level entity(built in with 7segment decoder code) example?