Monday, May 31, 2010

megit decoder

vhdl code to design a Meggit Decoder for the cyclic code (7,4) with g(x) = 1 + X + X3 .

IC 7490

explain pin diagram for IC 7490

vhdl code for pn sequence generator

plz give me a vhdl code for pseudo random sequence generator.

Saturday, May 22, 2010

8 bit super register

I WANT A VERILOG CODE FOR UNIVERSAL REGISTER
It has 5 inputs: clk, data_in , control, data_sh_r and data_sh_l. The first input, clk, is the clock input where any new operation takes place at the rising edge of this clock signal. The second input, data_in, is an 8 bit input used to load a new data into our register. The third input, control, is a 3 bit input to determine which operation of the eight operations to be performed. The last two inputs, data_sh_r and data_sh_l, each is a 1 bit input used as a shift-in bit when shifting right or left respectively. The Register has two outputs. The first output is 8 bit representing the output data from the register, while the second output is a single bit which is ‘1’ when the output of the register is “00000000” and is ‘0’ otherwise.

code for elevator control....

i need vhdl code for elevator control system

Thursday, May 20, 2010

fpga implementation of reed solomon decoder

can anyone send me the vhdl coder using berlekamp massey key equation for decoder for synthesizing and implement on xilinx FPGA with virtex version-4 and series 35 along with explanation....

vhdl code for 8 bit cpu

urgently needed code for 8 bit cpu.PL help.

embedded c

suggest books relating to embedded c (for ARM) IF so send me links

Saturday, May 8, 2010

nios based

i am doing the project in the DE2 kit of altera with SD card audio and PS2 keyboard.can anyone help me to make the code to send the input through the keyboard and view the result in LCDmodule

state space model of AC servo motor/PMSM motor

my project is to control the position of AC servo motor by sliding mode control so i want the mathematical model of AC servo/PMSM motor(3-phase) i m facing diffculty while generating the mathematical model actually i want to simulate the model in SIMULINK/MATLAB for that i required the [A][B][C][D] matrix or transfer function if any body already work on the same motor or any link regarding the same kindly send memy project is to control the position of AC servo motor by sliding mode control so i want the mathematical model of AC servo/PMSM motor(3-phase) i m facing diffculty while generating the mathematical model actually i want to simulate the model in SIMULINK/MATLAB for that i required the [A][B][C][D] matrix or transfer function if any body already work on the same motor or any link regarding the same kindly send me

PTM module in (*.pm format)

how to use PTM module card (*.pm format http://www.eas.asu.edu/~ptm/)for HSPICE... Because when i used finfet module card for 32nm ptm i got message pmos1 unfound eventhough i have done many attempt but problem presist( kept same name)

how to use BSIM3v3 for modeling mosfet

Tell me how to use bsim3v3 for modeling, since i have written my own mathematical equation and i wanted to modify bsim model card. how to extract parameter (which tools can be used to modify and extract the parameter? does Hspice or spectre support this )... however i have download bsim4 in c - code....

keypad

what the concept of keypad???vhdl programing...interfacing with FPGA board spartan starter kit board?

what are the symmetric signaling schemes

what are the symmetric signaling schemes,and


ddc-db

mj-sib

mj-db

asf-lc the above terms stands for
which type of adder is having less switching transitions and low power and low area?
and also which type of multiplexer is having the same qualities ?

processor verification

How to verify the processor using specman

How to resimulate a verilog-A simulation?

I have simulated a verilog-A netlist using spectre.
I have the savetime file (*.srf) at 55us.
I want to re-simulate design from 55us to 100us.
While doing so, the verilog A models are giving wrong result.

Can anybody tell me how to re-simulate the design.

guidance program

iwant program in "verilog" to giude amissile ,IF the input of target are none {Module Guidance(trgt_distination,trgt_velocity,angle).
THE MISSLE IS GOING ON{x,y}axis (that mean we used the Laws of linear motion )


(by using fpga )

how to implement vhdl coding on fpga

i am doing booth encoded wallace tree multiplier(32 bit) using VHDL/VERILOG .
but i don't know how to implement vhdl code on fpga board .
i am using SPARTAN 3E KIT (FPGA BOARD).

please send me the steps how to run the coding on fpga board FOR 32 BIT VHDL CODE.

Friday, May 7, 2010

Keypad Scanner & LCD

I am trying to program the FPGA such that it takes inputs from HEX Keypad & show the output on LCD. Ex. pressing 4 5 6 9 8 on Keypad should display 45698 on the lcd.
suggest me the logic or some sample codes in VHDl to guide me through..

Matrix Mutliplication

i am planning to design the matrix multiplication,IF any one have the good material for this plz provide me.

2x1 mux using half adders

I need a circuit for 2x1 mux using half adders

Are real nos in VHDL synthesizable???

how to find the average and variance of 25 complex numbers in VHDL.the complex numbers are generated using matlab.I have 2000 complex nos of which i have to find average and variance taking 25 complex nos at a time.

In VHDL, are real nos not synthesisable??if so how should i convert complex no to STD_LOGIC_VECTOR..
pls help me in this regard...,