8257 DMA Controller

Want notes and block diagram of 8257 DMA Controller.

fabrication of IC

what is fabrication? what are the various fabrication techniques?

power amplifiers

why do power amplifiers need large amplitude signal at its output.why do we get get noise when we send small scale amplitude signals. what is the function of baseband amplifiers

Regarding Area constraint in the Device

am having 8-bitALU component resource. Can any one tell me how will i get the number, which is how many number of 8-bitALU'S can fit into the particular xilinx Device(xc4vfx60-11-ff1152

VHDL code for 8-bit DES(Data Encryption Std)

Want VHDL code for 8-bit DES(Data Encryption Standard)...

VHDL CODING OF UART

PLEASE GIVE ME VHDL CODE OF UART

Multiplier Code in Verilog

can anyone tell me how to write a code for a multiplier with two 16 bit inputs?

Cyclone III and Spansion SPI Flash

I am using Cyclone III FPGA in my project for configuration of FPGA i wanted to use Spansion SPI flash in place of EPCS but i found that there are some errors may occur while programing SPI flash with Quartus II. Can anyone suggest me the way to avoid the issues in programming spansion SPI flash connected to cyclone III.

delay in vhdl

i am designing a traffic light controller in vhdl.i want to know how to give delay to change over the signal in finite state machine program with a inbuilt clock of 24MHZ.can somebody help me to finish my design?

Design and simulation of circuits

1. How can i design and simulate a circuit to count the number of 1s in a 7-bit input word and return it in a 3-bit output word. a) Use verilog structural modelling and 1-bit full-adders as the building block of your cct. How many Logic elements(LE) are needed to implement your design in the Cyclone II FPGA device (EP2C70F672C7)? How many FAs are needed? b) How many Full- Adders would be needed if the input word was 15-bit wide?

4 bit memory

can anyy one have a idea on 4 bit memory,,, i have to design this for a pressure sensor in pspice,,,

cricuit methods to solve signal integrity problems

I wanted to know what are the different circuit methods (not fabrication methods) available to solve the signal integrity problems in deepsubmicron technologies.

a bridge between apb and i2cslave?

need the bridge description of apb master to i2c slave apb works at 6 mhz and send 32 bits parallel data i2c works at 3mhz and receives the 8 bit serial data what wil be the decoder logic between bridge and i2c interface"? bridge wil work at wat frequency? i chosen bridge as asynchronous dual port fifo?
Detail pl.

CMOS Camera interface Question.

First let me start off by saying I hope I posted this question in the right place. Now my real question. I have just been getting into the world of robotics and so far it has been going great. I only have one problem; I purchased a CMOS camera but I cant use it because it uses a parallel output. I want to make a small board to convert the parallel output to a serial output but I am not sure how. The camera uses a 8 bit parallel connection and it has been suggested to me that I should use a 8 bit PAR/SER shift register but I am looking for a second opinion so I know for certain what I should do.

IAR embedded workbench sensor code

I have to do code for a low power sensor system. It is a MSP430 based resistance sensor measurement system that has 3 variable sleep times depening on the resistance been measured
help me please with the code ?

: BZ-FAD

need vhdl code for BZ-FAD architecture.......or hot block ring counter dat was used in it...

Depth to Address width in verilog

I am reading this topic "verilog code for RAM and FIFO" in which address width of the address bus is given as - parameter ADDR_BUS_WD = 1>>DEPTH; //Address bus width My question is, why is this supposed to work? The reason I ask is because it is not working for me in Aldec's Riviera Pro tool.

Need ADC for DAQ system

am making a PC controlled data acquisition system in which i've used ADC0808 whose conversion time is 100microseconds. I want to replace it by another one having less conversion time.

Verilog code for RAM

(1) I am trying to design a 128bytes RAM similar to tht of 8051 using verilog... plz

clock division

need code for clock division in VHDL

importance of delays

What is the importance of delays in digital circuits(combinational and sequential),and what we actually mean by recovery and removal times? what is the consequence if these conditions (recovery and removal times)are not met for a circuit?

16 bit multi-operand Comparator

send me or guide for a synthesizable vhdl code for a 16 bit multi-operand comparator.

Industrial Application of 8085 microprocessor

I want an application of the 8085 in detail with the block diagram and description of the application.

What is better FPGA or CPLD?

which 1 is betterfpga or cpld and why? and, why there grade speeds r mentioned as negative values?

i need a verilog code for braille code

i need a program/code for braille code..

shift multiplier

i want to know the ASM chart and verilog HDL code for 4bit shift multiplier... can anybody help me..

coding for electronic digital clock

i want to know the vhdl and c lang. coding for digital clock based on PIC16F84A micro controller?

ETHERNET/IP

I want to modify the ethernet (10/100) ip core to industrial ip core. so any one pl give me detail about industrial ip core and its specification...?

VHDL and FPGA

want a Project idea for Real time implementation to do in VHDL...