93lc86c EEPROM

Please provide me 93lc86c EEPROM interfacing code either in verilog or vhdl

BUILT IN SELF TEST FOR RAM

could you please help me in how to find the code for BUILT IN SELF TEST OF RAM in vhdl language please help me

spi slave

want to implement an spi slave block in VHDL and I have the following question:
Do I have to use the CSn (chip select signal) as an asynchronous reset of the SPI slave block?
I don't want to use any additional master clock in order to sample the SPI signals, but I want to use the SCK to clock my flops. So I want to reset the internal FSM every time the CSn is going high.

Is this a good way to implement it?

Number of Process Vs Simulation Time with VHDL

Does more number of processes in a vhdl design file have any effect on simulation time with Modelsim?

DIffernce Between VHDL & VERILOG

any one pl tell the differnce between verilog and Vhdl

keypad

what the concept of keypad???vhdl programing...interfacing with FPGA board spartan starter kit board?

how to implement vhdl coding on fpga

i am doing booth encoded wallace tree multiplier(32 bit) using VHDL/VERILOG .
but i don't know how to implement vhdl code on fpga board .
i am using SPARTAN 3E KIT (FPGA BOARD).

please send me the steps how to run the coding on fpga board FOR 32 BIT VHDL CODE.

Keypad Scanner & LCD

I am trying to program the FPGA such that it takes inputs from HEX Keypad & show the output on LCD. Ex. pressing 4 5 6 9 8 on Keypad should display 45698 on the lcd.
suggest me the logic or some sample codes in VHDl to guide me through..

Are real nos in VHDL synthesizable???

how to find the average and variance of 25 complex numbers in VHDL.the complex numbers are generated using matlab.I have 2000 complex nos of which i have to find average and variance taking 25 complex nos at a time.

In VHDL, are real nos not synthesisable??if so how should i convert complex no to STD_LOGIC_VECTOR..
pls help me in this regard...,

Keypad Scanner & LCD

I am trying to program the FPGA such that it takes inputs from HEX Keypad & shows the output on LCD. Expressing 4 5 6 9 8 on Keypad, should display 45698 on the lcd. suggest me the logic or some sample codes in VHDl to guide me

SAFER(Security And Fast Encryption Routine)algrthm

Is there any code for SAFER ALGORITHM in VHDL r in Verilog

7segment

I need to display different numbers on the 7segments that are on the fpga according to the input I have. For example if I want to display the number 250, 2 on the 1st segment, 5 on the 2nd and 0 on the 3rd... How do I do it in VHDL pls?

Till now I am only capable of displaying the same number on all of the segments. My fpga is a spartan 3e-100

If anyone could help me I would really appreciate.

7segment

I need to display different numbers on the 7segments that are on the fpga according to the input I have. For example if I want to display the number 250, 2 on the 1st segment, 5 on the 2nd and 0 on the 3rd... How do I do it in VHDL pls? Till now I am only capable of displaying the same number on all of the segments. My fpga is a spartan 3e-100. Anyone Pl help me.

delay in vhdl

i am designing a traffic light controller in vhdl.i want to know how to give delay to change over the signal in finite state machine program with a inbuilt clock of 24MHZ.can somebody help me to finish my design?

clock division

need code for clock division in VHDL

VHDL and FPGA

want a Project idea for Real time implementation to do in VHDL...

VHDL-AMS - hAMSter

I am working in hAMSter, A VHDL AMS tool. I would like to know , whether I will be able to represent a random signal, whose data I have, as a SIGNAL to be processed in a hAMSter program. The hAMSter program is developed and it is working, only thing is I should send my random data from a dat file in to the hAMSter program by some file I/o process as a "SIGNAL" or some entity. Is it possible.

CODIFICADOR QPSK

needed vhdlcode for condificador qpsk

8-bit sine-wave generator at 10 KHz VHDL

Can anyone show me the complete source code of VHDL of an 8-bit sine-wave generator at 10 KHz?

fpga based alarm door security

i need to design an alarm door security by using vhdl that will embedded on fpga.this security will use keypad that need user to enter the password for security. if the user enter the wrong password for three times,this alarm will be ringing instead of block the door. please help me in designing the source code for programming the ic by using vhdl.