delay in vhdl

i am designing a traffic light controller in vhdl.i want to know how to give delay to change over the signal in finite state machine program with a inbuilt clock of 24MHZ.can somebody help me to finish my design?

importance of delays

What is the importance of delays in digital circuits(combinational and sequential),and what we actually mean by recovery and removal times? what is the consequence if these conditions (recovery and removal times)are not met for a circuit?