Tuesday, September 29, 2009

4-bit counter code in VHDL.

Have to do a 4-bit counter code in VHDL. It hads a 4 line input (A) a 10Hz CLK input a load input which is asynchronous a UP/Down (Down is Not down) and is synchronous a Reset input which is asynchronous a 2 line setect input line (x) a 2 line setect input line (y) a 4 line output (count) a one line output called (xeq Y) Does anyone know the code

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