Design and simulation of circuits

1. How can i design and simulate a circuit to count the number of 1s in a 7-bit input word and return it in a 3-bit output word. a) Use verilog structural modelling and 1-bit full-adders as the building block of your cct. How many Logic elements(LE) are needed to implement your design in the Cyclone II FPGA device (EP2C70F672C7)? How many FAs are needed? b) How many Full- Adders would be needed if the input word was 15-bit wide?